Lecture: Memory Disaggregation with Coherent Interconnect Technologies

Lukas Wenzel (HPI)


The decoupling of compute and memory resources gives distinct advantages in terms of provisioning and operational flexibility that may result in significant efficiency benefits to large scale data center installations with diverse workloads. Thus, the concept of memory disaggregation has been under consideration for several decades, though added signalling distances and protocol overheads have limited practical realizations.

Today, with evolving coherent interconnect standards such as CXL, CCIX and OpenCAPI, early prototypes implementing memory disaggregation over these protocols are becoming available, offering the prospect and revealing the challenges of disaggregated memory architectures in production systems.

In this lecture, we will explore how the concept of memory disaggregation as well as underlying implementation strategies have evolved over time. Finally, we will have a closer look at the architecture and performance of a prototypical setup based on OpenCAPI and ThymesisFlow.

Lukas Wenzel (HPI)

Lukas Wenzel is a Ph.D. student in the Operating Systems and Middleware group of Andreas Polze at the Hasso-Plattner-Institute in Potsdam, Germany.
He received his M.Sc. in 2019 and has since been interested in FPGA accelerators, memory subsystems and energy aware computing.