Olaf Spinczyk and Daniel Friesel (University of Osnabrück)
The times of simple, one-dimensional storage hierarchies such as CPU cache – main memory – hard drive are long gone. Fast SSDs and multi-processor systems with non-uniform memory architectures (NUMA) have become a part of everyday life, and operating system schedulers and memory allocators are becoming aware of their performance implications. However, recent developments such as remote direct memory access (RDMA), near-memory computing (NMC), and high-bandwidth memory (HBM) challenge the established guidelines. A high-performance server outfitted with these disruptive memory technologies (DMTs) has to deal with heterogeneous compute cores, memory regions with varying latency and throughput, and -- in case of RDMA -- remote caches and memories, i.e., more than one memory hierarchy.
The ideal system software automatically schedules tasks and allocates memory so that each application utilizes the compute and memory technologies that best suit its workload, thus maximizing efficiency. A real system software should at least aim to use the available resources as efficiently as possible, and not waste them due to improper scheduling and allocation decisions. To do so, it needs techniques that allow it to predict latency, throughput, and related performance attributes for workload execution in various CPU and memory constellations, and consider interactions (e.g. contention) between tasks that run in parallel. These, in turn, rely on performance models for the individual DMTs.
The lecture will give an overview over DMT-specific performance models as well as system-level performance modeling approaches and their suitability for dealing with DMTs. In doing so, we will compare advantages and drawbacks of individual approaches, and identify open research questions.
Prof. Dr.-Ing. Olaf Spinczyk (University of Osnabrück)
Daniel Friesel (University of Osnabrück)
Olaf Spinczyk leads the Embedded Software Systems Group at the Department of Computer Science at Osnabrück University, Germany. He studied Computer Science at TU Berlin and received his Ph.D. from the University of Magdeburg in 2002. After being a postdoc at the Operating Systems and Distributed Systems Group at the University of Erlangen-Nuremberg he became a professor at TU Dortmund in 2007 and moved on to Osnabrück in 2018. He is the coordinator of the new DFG-funded priority program on "Disruptive Memory Technologies". His own research project has its focus on modeling these systems. Other projects address OS architectures for modern heterogeneous manycore systems and modelling non-functional properties of software product lines.
Daniel Friesel is a PhD student at Osnabrück University, where he is currently
wrapping up his doctoral studies under supervision of Prof. Olaf Spinczyk. His
past research focused on the intersection of energy models for CPS/IoT and
performance models for software product lines, algorithms for benchmarking and
model generation, and performance-aware system configuration. Going forward, he
will be looking into performance models and optimization methods for Disruptive
Memory Technologies as part of a DFG-funded priority program on this topic.